標題: SIMULATION OF THE ELECTRICAL CHARACTERISTICS OF FIELD-EMISSION TRIODES WITH VARIOUS GATE STRUCTURES
作者: KU, TK
CHEN, MS
WANG, CC
FENG, MS
HSIEH, IJ
HUANG, JCM
CHENG, HC
材料科學與工程學系
電子工程學系及電子研究所
Department of Materials Science and Engineering
Department of Electronics Engineering and Institute of Electronics
關鍵字: FIELD-EMISSION TRIODES (FETS);VOLCANO-SHAPED GATE;GATE APERTURE;TIP-TO-GATE HEIGHT;EMITTER SHAPE
公開日期: 1-十月-1995
摘要: A new two-dimensional numerical simulation which can accurately reproduce the empirical electrical characteristics of vertical field-emission triodes (FET's) with various gate geometries has been developed. The electrical characteristics of volcano-shaped-gate FET's were simulated for the first time and compared with those of planar-gate ones. Volcano-shaped-gate FET's exhibit significant advantages over planar-gate ones due to their superior current-voltage (I-V) properties and larger tolerance of fabrication error. A reasonable definition of emission area was obtained by applying the non-uniform current density model. For sub-micron gate aperture, the gate current is obvious only if the device structure is deeply tip-recessed. On the basis of the evaluation of the device structures including the tip cone angle, the related tip-to-gate height, the emitter shape, and the shrinkage of gate aperture, a high-aspect-ratio conical emitter with a small tip radius will be the optimum structure of FET's for low-voltage operation.
URI: http://hdl.handle.net/11536/1709
ISSN: 0021-4922
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS
Volume: 34
Issue: 10
起始頁: 5789
結束頁: 5796
顯示於類別:期刊論文


文件中的檔案:

  1. A1995TF79500058.pdf