標題: A 7.4-mW 200-MS/s Wideband Spectrum Sensing Digital Baseband Processor for Cognitive Radios
作者: Yu, Tsung-Han
Yang, Chia-Hsiang
Cabric, Danijela
Markovic, Dejan
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS digital integrated circuits;cognitive radio (CR);power and area minimization;wideband spectrum sensing
公開日期: 1-九月-2012
摘要: "A digital baseband cognitive radio spectrum sensing processor with 200-kHz resolution over 200-MHz bandwidth is integrated in 1.64 mm in 65-nm(2) CMOS. The processor uses adaptive channel-specific threshold and sensing time to achieve detection probability >= 0.9 and false-alarm probability <= 0.1 for -5-dB SNR and adjacent-band interferers of 30-dB INR within a 50-ms sensing time. The chip power and area are minimized by jointly considering algorithm, architecture, and circuit parameters. The chip dissipates 7.4 mW for a 200-MHz sensing bandwidth, which is a 22x reduction in power per sensing bandwidth compared with prior work."
URI: http://hdl.handle.net/11536/16711
ISSN: 0018-9200
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 47
Issue: 9
結束頁: 2235
顯示於類別:期刊論文


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  1. 000308007900024.pdf