標題: An Embedded Dynamic Voltage Scaling (DVS) System Through 55 nm Single-Inductor Dual-Output (SIDO) Switching Converter for 12-Bit Video Digital-to-Analog Converter
作者: Chou, Wen-Shen
Huang, Tzu-Chi
Lee, Yu-Huei
Yang, Yao-Yi
Su, Yi-Ping
Chen, Ke-Horng
Huang, Chen-Chih
Lin, Ying-Hsi
Lee, Chao-Cheng
Wen, Kuei-Ann
Hsu, Ying-Chih
Peng, Yung-Chow
Hsueh, Fu-Lung
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Single-inductor dual-output (SIDO);digital to analog converter (DAC);DC-DC converter;dynamic voltage scaling (DVS);least significant bit (LSB);differential nonlinearity (DNL);integral nonlinearity (INL);spurious free dynamic range (SFDR)
公開日期: 1-Jul-2012
摘要: "This paper proposes a 55 nm CMOS 12-bit current- steering video digital-to-analog converter (DAC) directly powered by the single-inductor dual-output (SIDO) switching converter to compose a dynamic voltage scaling (DVS) system and improve the power efficiency. Dual-DVS control in both digital and analog circuits can effectively reduce power consumption. With various supply voltages, the video DAC can meet several different specifications in the power optimized (PO) mode. Furthermore, for DAC, the proposed 3S method, including finger separating, splitting and shifting, achieves good differential nonlinearity (DNL) performance to 0.78/0.4 least significant bit (LSB) and integral nonlinearity (INL) 1.3/1.0 LSB (with/without SIDO converter) without additional calibration. It also suppresses the switching noise interference from the SIDO converter. Moreover, for SIDO converter, the cross-regulation performance is greatly improved in both transient and steady state to achieve lowest interference for the analog supply. The total power efficiency can be improved up to 11.5% and 28% in the DVS and the PO mode. The SIDO supplied DAC with the dual-DVS function achieves 69.88 dB spurious free dynamic range (SFDR) at the 1 V output swing and 1 MHz input. The proposed intrinsic 12-bit DAC and SIDO converter achieve high definition video DAC performance with the benefit of area and energy efficiency."
URI: http://hdl.handle.net/11536/16635
ISSN: 0018-9200
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 47
Issue: 7
結束頁: 1568
Appears in Collections:Articles


Files in This Item:

  1. 000306913500007.pdf