標題: Effect of Gate Length on Device Performances of AlSb/InAs High Electron Mobility Transistors Fabricated Using BCl3 Dry Etching
作者: Kuo, Chien-I
Hsu, Heng-Tung
Hsu, Ching-Yi
Yu, Chia-Hui
Ho, Han-Chieh
Chang, Edward Yi
Chyi, Jen-Inn
材料科學與工程學系
電子工程學系及電子研究所
Department of Materials Science and Engineering
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-Jun-2012
摘要: In this paper, we present the development of a mesa isolation process for AlSb/InAs high electron mobility transistors (HEMTs) using inductively coupled plasma (ICP) etching with BCl3 gas. Devices with different gate lengths (L-g: 60, 100, and 200 nm) fabricated by this dry etching technique show good DC and RF performances. With an appropriate L-g/gate-channel distance ratio, the 200-nm-gate has very high peak transconductances of 781 mS/mm at V-DS = 0.1 V and 2000 mS/mm at V-DS = 0.5 V. Moreover, an extrinsic current gain cutoff frequency of 137 GHz and maximum oscillation frequency of 97 GHz were achieved at a drain bias voltage V-DS = 0.3 V, indicating the great potential for such a device operating at high frequency with extremely low DC power consumption. (c) 2012 The Japan Society of Applied Physics
URI: http://dx.doi.org/060202
http://hdl.handle.net/11536/16525
ISSN: 0021-4922
DOI: 060202
期刊: JAPANESE JOURNAL OF APPLIED PHYSICS
Volume: 51
Issue: 6
結束頁: 
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