Title: A junctionless SONOS nonvolatile memory device constructed with in situ-doped polycrystalline silicon nanowires
Authors: Su, Chun-Jung
Su, Tuan-Kai
Tsai, Tzu-I
Lin, Horng-Chih
Huang, Tiao-Yuan
電子工程學系及電子研究所
奈米中心
Department of Electronics Engineering and Institute of Electronics
Nano Facility Center
Keywords: JL;NW;poly-Si;SONOS;TFT
Issue Date: 29-Feb-2012
Abstract: In this paper, a silicon-oxide-nitride-silicon nonvolatile memory constructed on an n(+)-poly-Si nanowire [NW] structure featuring a junctionless [JL] configuration is presented. The JL structure is fulfilled by employing only one in situ heavily phosphorous-doped poly-Si layer to simultaneously serve as source/drain regions and NW channels, thus greatly simplifying the manufacturing process and alleviating the requirement of precise control of the doping profile. Owing to the higher carrier concentration in the channel, the developed JL NW device exhibits significantly enhanced programming speed and larger memory window than its counterpart with conventional undoped-NW-channel. Moreover, it also displays acceptable erase and data retention properties. Hence, the desirable memory characteristics along with the much simplified fabrication process make the JL NW memory structure a promising candidate for future system-on-panel and three-dimensional ultrahigh density memory applications.
URI: http://dx.doi.org/162
http://hdl.handle.net/11536/16134
ISSN: 1931-7573
DOI: 162
Journal: NANOSCALE RESEARCH LETTERS
Volume: 7
Issue: 
End Page: 1
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