標題: High-Reliability Trigate Poly-Si Channel Flash Memory Cell With Si-Nanocrystal Embedded Charge-Trapping Layer
作者: Chen, Hung-Bin
Wu, Yung-Chun
Chen, Lun-Chun
Chiang, Ji-Hong
Yang, Chao-Kan
Chang, Chun-Yen
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Nanocrystal (NC);nonvolatile memory (NVM);thin-film transistor (TFT)
公開日期: 1-四月-2012
摘要: This letter introduces a polycrystalline-silicon nanowire (NW) thin-film nonvolatile memory (NVM) with a self-assembled silicon-nanocrystal (Si-NC) embedded charge-trapping (CT) layer. This process is simple and compatible with conventional CMOS processes. Experimental results indicate that this NW NVM exhibits high reliability due to a deep-quantum-well structure and immunity of enhanced electric field underneath a disk-shaped Si-NC. After 10 000 P/E cycles, the memory window loss of the NVM with a Si-NC embedded CT layer is less than 12% until 10(4) s at 150 degrees C. Accordingly, a poly-Si thin-film transistor with a Si-NC embedded CT layer is highly promising for NVM applications.
URI: http://hdl.handle.net/11536/16081
ISSN: 0741-3106
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 33
Issue: 4
結束頁: 537
顯示於類別:期刊論文


文件中的檔案:

  1. 000302232900024.pdf