標題: Sub mu W Noise Reduction for CIC Hearing Aids
作者: Wei, Cheng-Wen
Su, Sheng-Jie
Chang, Tian-Sheuan
Jou, Shyh-Jye
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Acoustic noise;hearing aids;low power design;speech processing;VLSI
公開日期: 1-五月-2012
摘要: This paper presents a sub W noise reduction design to enhance speech for completely-in-the-canal (CIC) type hearing aids by optimizing its algorithm and associated architecture. In algorithm optimization, a low-complexity mixed perceptual-discrete wavelet packet transform (P-DWPT) and fast Hartley transform (FHT) are adopted for spectral decomposition and reconstruction. A simple yet efficient denoise method with 4-zone-voice activity detection (VAD) supports a consonant protection to improve speech quality and a skip scheme to reduce power consumption. In the designed architecture, mixed P-DWPT and FHT are folded into one 8-by-8 configurable butterfly computation unit with on-time scheduling for low power operation. The circuit is implemented with 0.18-mu m CMOS process and consumes only 0.65 mu W power at 1.0 V with a speech quality that is comparable to that achieved using other high-complexity algorithms.
URI: http://hdl.handle.net/11536/16009
ISSN: 1063-8210
期刊: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Volume: 20
Issue: 5
結束頁: 937
顯示於類別:期刊論文


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  1. 000302640200014.pdf