標題: Comprehensive Analysis of UTB GeOI Logic Circuits and 6T SRAM Cells considering Variability and Temperature Sensitivity
作者: Hu, Vita Pi-Ho
Fan, Ming-Long
Su, Pin
Chuang, Ching-Te
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 2011
摘要: A comprehensive comparative analysis of leakage-delay, stability and variability of GeOI logic circuits and 6T SRAM cells with respect to the SOI counterparts is presented. The UTB GeOI circuits show better power-performance than the bulk Ge-channel circuits, and preserve the leakage reduction property of stacking devices, while the band-to-band tunneling leakage of bulk Ge-channel devices cannot be reduced by stacking transistors. At Vdd = 1V and 400K, the delays of inverter, dynamic gates, latch and multiplexer for GeOI circuits are smaller than the SOI counterparts. For equal Ion design, the GeOI SRAM cells exhibit better mu RSNM/sigma RSNM and smaller cell leakage variation at both Vdd = 1V and 0.5V.
URI: http://hdl.handle.net/11536/15142
ISBN: 978-1-4577-0505-2
期刊: 2011 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)
Appears in Collections:Conferences Paper