標題: Wafer-level three-dimensional integrated circuits (3D IC): Schemes and key technologies
作者: Lai, Ming-Fang
Li, Shih-Wei
Shih, Jian-Yu
Chen, Kuan-Neng
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Three-dimensional integrated circuits (3D IC);Through-silicon via (TSV);Wafer bonding
公開日期: 1-十一月-2011
摘要: Schemes and key technologies of wafer-level three-dimensional integrated circuits (3D IC) are reviewed and introduced in this paper. Direction of wafer stacking, methods of wafer bonding, fabrication of through-silicon via (TSV), and classification of wafer type are options for 3D IC schemes. Key technologies, such as alignment. Cu bonding, and TSV fabrication, are described as well. Better performance, lower cost, and more functionality of future electronic products become feasible with 3D IC concept application. (C) 2011 Elsevier B.V. All rights reserved.
URI: http://dx.doi.org/10.1016/j.mee.2011.05.036
http://hdl.handle.net/11536/15065
ISSN: 0167-9317
DOI: 10.1016/j.mee.2011.05.036
期刊: MICROELECTRONIC ENGINEERING
Volume: 88
Issue: 11
起始頁: 3282
結束頁: 3286
顯示於類別:期刊論文


文件中的檔案:

  1. 000298461700018.pdf