標題: A Sub-mW All-Digital Signal Component Separator With Branch Mismatch Compensation for OFDM LINC Transmitters
作者: Chen, Tsan-Wen
Tsai, Ping-Yuan
Yu, Jui-Yuan
Lee, Chen-Yi
電機工程學系
Department of Electrical and Computer Engineering
關鍵字: Branch imbalance;efficiency;LINC;mismatch;OFDM;outphasing;SCS
公開日期: 1-十一月-2011
摘要: Linear amplification with nonlinear components (LINC) is an attractive technique for achieving linear amplification with high efficiency. This paper presents a sub-mW all-digital signal component separator (SCS) design for OFDM LINC transmitters, including a phase calculator and a digital-control phase shifter (DCPS) pair. In addition, a digital mismatch compensation scheme is proposed and integrated into the SCS to reduce the design complexity of the power amplifier. This chip is manufactured in a 90 nm standard CMOS process with an active area of 0.06 mm(2). The DCPS can generate phase-modulated signals at 100 MHz with 8-bit resolution and RMS error 9.33 ps (0.34 degrees). The phase calculation can be performed at a maximum speed of 50 MHz using a 0.5 V supply voltage, resulting in a 73.88% power reduction. Comparing to state-of-the-art, the power consumption of the overall SCS is only 949.5 mu W which minimizes the power overhead for an LINC transmitter. This SCS with the branch mismatch compensation provides a 0.02 dB gain and 0.15 degrees phase fine-tune resolution without adding additional front-end circuits. Considering 1 dB gain and 10 degrees phase mismatch, the system EVM of -29.81 dB and ACPR of -34.56 dB can still be achieved for 5 MHz bandwidth 64-QAM OFDM signals.
URI: http://dx.doi.org/10.1109/JSSC.2011.2164133
http://hdl.handle.net/11536/14682
ISSN: 0018-9200
DOI: 10.1109/JSSC.2011.2164133
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 46
Issue: 11
起始頁: 2514
結束頁: 2523
顯示於類別:期刊論文


文件中的檔案:

  1. 000296234100008.pdf