標題: Ge/IIIV fin field-effect transistor common gate process and numerical simulations
作者: Chen, Bo-Yuan
Chen, Jiann-Lin
Chu, Chun-Lin
Luo, Guang-Li
Lee, Shyong
Chang, Edward Yi
材料科學與工程學系
Department of Materials Science and Engineering
關鍵字: atomic layer deposition;transistors;numerical simulation;computational fluid dynamics
公開日期: 1-Apr-2017
摘要: This study investigates the manufacturing process of thermal atomic layer deposition (ALD) and analyzes its thermal and physical mechanisms. Moreover, experimental observations and computational fluid dynamics (CFD) are both used to investigate the formation and deposition rate of a film for precisely controlling the thickness and structure of the deposited material. First, the design of the TALD system model is analyzed, and then CFD is used to simulate the optimal parameters, such as gas flow and the thermal, pressure, and concentration fields, in the manufacturing process to assist the fabrication of oxide-semiconductors and devices based on them, and to improve their characteristics. In addition, the experiment applies ALD to grow films on Ge and GaAs substrates with three-dimensional (3-D) transistors having high electric performance. The electrical analysis of dielectric properties, leakage current density, and trapped charges for the transistors is conducted by high-and low-frequency measurement instruments to determine the optimal conditions for 3-D device fabrication. It is anticipated that the competitive strength of such devices in the semiconductor industry will be enhanced by the reduction of cost and improvement of device performance through these optimizations. (C) 2017 Society of Photo-Optical Instrumentation Engineers (SPIE).
URI: http://dx.doi.org/10.1117/1.JMM.16.2.024501
http://hdl.handle.net/11536/145697
ISSN: 1932-5150
DOI: 10.1117/1.JMM.16.2.024501
期刊: JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS
Volume: 16
Issue: 2
起始頁: 0
結束頁: 0
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