|標題:||Reducing Forming Voltage by Applying Bipolar Incremental Step Pulse Programming in a 1T1R Structure Resistance Random Access Memory|
Sze, Simon M.
Department of Electronics Engineering and Institute of Electronics
|關鍵字:||Resistance random access memory (RRAM);1T1R;incremental step pulse programming (ISPP);forming voltage|
|摘要:||This letter introduces a method of using bipolarity bias voltages in the forming process to effectively reduce the forming voltage of a one-transistor and one-resistance random access memory device. A bipolar incremental-step-pulse programming process is applied, and a complete operation pulse for the forming process is described. This method reduces forming voltage without any cost to the device performance, and the device maintains good reliability. The likely physical mechanism of this bipolar operation is also presented based on the measured electrical characteristics.|
|期刊:||IEEE ELECTRON DEVICE LETTERS|
|Appears in Collections:||Articles|