標題: Incorporating Yttrium into a GeO Interfacial Layer with HfO2-Based Gate Stack on Ge
作者: Chou, Chen-Han
Lu, Yu-Hong
Tsai, Yi-He
Shih, An-Shih
Yeh, Wen-Kuan
Chien, Chao-Hsin
材料科學與工程學系
電子工程學系及電子研究所
Department of Materials Science and Engineering
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-Jan-2018
摘要: In this study, we employed the electrical and material properties of various interfacial layers (ILs) such as GeO and YGeO on a Ge substrate. First, capacitors using various ILs with HfO2-based gate stacks were developed. The capacitor using YGeO IL exhibited a low interface state density (D-it) of 2.5 x 10(11) eV(-1)cm(-2) and an equivalent oxide thickness of 1.8 nm. Next, a reliability test for constant voltage stress was conducted for further studying the YGeO ILs. The capacitors with YGeO ILs presented higher immunity for Dit degradation. Further, to understand the material properties of various ILs, a simple experiment on capping a Si chip on GeO or YGeO/Ge samples through high-temperature annealing was conducted. We observed that Ge and GeO vapors can be absorbed by Si and detected through X-ray photoelectron spectroscopy (XPS). XPS spectra of Si chips capped on GeO IL presented obvious features of Ge and GeO through annealing at 500 degrees C; however, the XPS spectra of Si chips capped on YGeO IL presented no features, indicating that YGeO ILs had higher thermal stability than GeO ILs. To further analyze the HfO2-based gate stacks with various ILs, Ge diffusion into a high-k HfO2 layer was investigated through angle-resolved XPS. We observed that YGeO ILs with HfO2-based gate stacks can reduce Ge diffusion into a HfO2 layer. (C) 2018 The Electrochemical Society.
URI: http://dx.doi.org/10.1149/2.0161802jss
http://hdl.handle.net/11536/144535
ISSN: 2162-8769
DOI: 10.1149/2.0161802jss
期刊: ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY
Volume: 7
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