標題: Dielectric degradation of Cu/SiO2/Si structure during thermal annealing
作者: Chiou, JC
Wang, HI
Chen, MC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 1-三月-1996
摘要: The impact of Cu on the dielectric SiO2 layer was studied using a Cu/SiO2/Si metal oxide semiconductor capacitor and rapid thermal annealing (RTA) treatment. With the RTA treatment, no chemical reaction was observed up to 900 degrees C; however, dielectric degradation occurred following RTA at 300 degrees C for 60 s and became worse with the increase of annealing temperature. The interface-trap density at the SiO2/Si interface also increased from 5 x 10(10) to 5 x 10(13) eV(-1) cm(-2) after 800 degrees C RTA treatment. The RTA anneal introduced a large number of positive Cu ions into the dielectric SiO2 layer. Under bias-temperature stress, Cu ions drift quickly in the SiO2 layer and may drift across the SiO2/Si interface and enter the Si substrate. With the use of 1200 Angstrom thick TiN and TiW barrier layers, respectively, the dielectric strength of the Cu/(barrier)/SiO2/Si structures was able to remain stable up to 500 and 600 degrees C.
URI: http://hdl.handle.net/11536/1424
ISSN: 0013-4651
期刊: JOURNAL OF THE ELECTROCHEMICAL SOCIETY
Volume: 143
Issue: 3
起始頁: 990
結束頁: 994
顯示於類別:期刊論文


文件中的檔案:

  1. A1996UC20300043.pdf