Design of High-Voltage-Tolerant Stimulators in Low-Voltage CMOS Process with Charge-Balanced and Energy-Efficient Properties for Biomedical Applications
|關鍵字:||刺激器;高壓共容;電荷平衡;動態電源;Stimulator;High Voltage Tolerant;Charge Balance;Dynamic Power Supply|
其次，本論文介紹並分析了一種全新的基於低壓器件的提升電路系統耐壓程度的方法。採用堆疊具有深N阱層的低壓器件可將電路系統的工作電壓提升到12 V。再次，本論文介紹並分析了一種低功耗型高精度電荷平衡的方法。基於這兩種全新的方法，採用0.18-μm 1.8-V/3.3-V的CMOS製程設計了一個高壓共容的刺激器，試驗證實該電路在12 V電源電壓下能可靠的工作。採用低壓CMOS製程設計的刺激器能和微處理器、生醫信號處理器等集成在一個晶片上，提高系統的集成度，降低系統的尺寸。採用雙回路校準和漏電電流補償的電流記憶體能確保刺激器的電荷失配度小於0.25%，搭配放電操作，殘留的直流電流小於6.6nA。
Epilepsy is a group of neurological disorders resulting from excessive and abnormal discharges in the brain. Most epilepsy patients can be cured by the antiepileptic drugs (AEDs). However, approximately 30% of patients suffer from medically refractory epilepsy. Deep brain stimulation (DBS) therapy is a fairly new treatment for epilepsy and is being researched. A closed-loop DBS system that continuously monitors the brain’s activity is an ongoing engineering technology. However, a circuit designer faces a number of challenges while designing a stimulator, such as the realization of high-level integration, the efficient power delivery to the stimulators, the delivery of the safe electrical stimulation, and the reduction of medical costs. In this thesis, I have presented four new techniques to enhance some key specifications of stimulator such as enhancing the integration, reducing the size, improving the charge balance, and improving the power efficiency. First, a new technique for smoothing the charging current of charge pump is introduced and described. This technique is capable of reducing the smoothing capacitance in the power line, reducing the transient noise in the power supply line, and improving the electromagnetic emission (EME) behavior of the implantable devices. The theoretical analyses indicate that the charging current of 3-stage cross-couple charge pump can be smoothed greatly when the clock signals are separated averagely to each other. The charge pump with this new clocking scheme has been designed and successfully verified in a 0.18-μm 1.8-V/3.3-V CMOS process. Experimental results show that the charging current ripples of the charge pump are reduced by a factor of three. In addition, the power efficiency is improved. Second, a high-voltage-tolerant technique is introduced and described. The use of the stacked transistors with deep n-well layers made it possible to increase the operation voltage of the proposed stimulator to 12 V. Third, a precise charge-balanced technique is introduced and described. The stimulator with this new high-voltage-tolerant technique and precise charge-balanced technique has been designed and successfully verified in a 0.18-μm 1.8-V/3.3-V CMOS process. The reliability measurement results have verified that the proposed stimulator is robust. The stimulator can be fully integrated with the microcontroller or the biomedical signal processor into an SoC chip fabricated by using the LV CMOS technology for enhancing integration and reducing the size. The current memory cell with dual calibration loops and leakage current compensation ensures that the charge mismatch of stimulator is less than 0.25% and the residual average dc current is less than 6.6 nA with shorting operation. Four, a digitally dynamic power supply technique for multi-channel stimulator is introduced and described. The existing stimulators with dynamic power supplies use too much analog circuits, such as attenuator, ADC, amplifier, comparator, which lead to large layout area and power dissipation. In contrast, the proposed digitally dynamic power supply technique examines the operating region (triode vs. saturation) of the current generator by a simple PMOS inverter. The output of the charge pump is driven by a digital input, eliminating the need of decision-making analogue circuits. High power efficiency is achieved by optimising the efficiency of each circuit module and using the adaptive power supply. A 16-channel 12V-tolerant stimulator with this digitally dynamic power supply technique has been designed and successfully verified in a 0.18-μm 1.8-V/3.3-V CMOS process. The experimental results have shown that the proposed new digitally dynamic power supply technique for multi-channel stimulator can greatly improve the power efficiency. Final, the in vivo experiments verified that epileptic seizures could be suppressed by the electrical stimulation with certain stimulation parameters provided by the proposed stimulator.
|Appears in Collections:||Thesis|