標題: SCR device fabricated with dummy-gate structure to improve turn-on speed for effective ESD protection in CMOS technology
作者: Ker, MD
Hsu, KC
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: charged device model (CDM);dummy gate;electrostatic discharge (ESD);silicon-controlled rectifier (SCR)
公開日期: 1-五月-2005
摘要: Turn-on speed is the main concern for an on-chip electrostatic discharge (ESD) protection device, especially in the nanoscale CMOS processes with ultrathin gate oxide. A novel dummy-gate-blocking silicon-controlled rectifier (SCR) device employing a substrate-triggered technique is proposed to improve the turn-on speed of an SCR device for using in an on-chip ESD protection circuit to effectively protect the much thinner gate oxide. The fabrication of the proposed SCR device with dummy-gate structure is fully process-compatible with general CMOS process, without using an extra mask layer or adding process steps. From the experimental results in a 0.25-mu m CMOS process with a gate-oxide thickness of similar to 50 angstrom, the switching voltage, turn-on speed, turn-on resistance, and charged-device-model ESD levels of the SCR device with dummy-gate structure have been greatly improved, as compared to the normal SCR with shallow trench isolation structure.
URI: http://dx.doi.org/10.1109/TSM.2005.845112
http://hdl.handle.net/11536/13769
ISSN: 0894-6507
DOI: 10.1109/TSM.2005.845112
期刊: IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
Volume: 18
Issue: 2
起始頁: 320
結束頁: 327
顯示於類別:期刊論文


文件中的檔案:

  1. 000229158000012.pdf