|標題:||Custom 6-R, 2-or 4-W Multi-Port Register Files in an ASIC SOC with a DVFS Window of 0.5 V, 130 MHz to 0.96 V, 3.2 GHz in a 28-nm HKMG CMOS Technology|
Dhong, Sang H.
Department of Electronics Engineering and Institute of Electronics
|摘要:||We describe custom 6R, 2/4W general-purpose register files (GRF) in an ASIC-based SOC implemented in a N28 CMOS technology, which has roughly a 2 similar to 3 X smaller area, 2 X faster speed, and 5 X lower power than a logic synthesized version. Synthesized and custom GRFs also have a different read behavior from static and dynamic circuitry used, respectively. This is addressed by modifying a bypass control block. Hardware showed a DVFS window of 0.5 V @ccuit, 130 MHz to 0.96 V, 3.2 GHz.|
|期刊:||2015 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)|