標題: On the prediction of geometry-dependent floating-body effect in SOI MOSFETs
作者: Su, P
Lee, W
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: body source built-in potential lowering;floating-body effect;silicon-on-insulator (SOI) CMOS;threshold voltage;partially depleted (PD);fully depleted (FID)
公開日期: 1-七月-2005
摘要: This brief demonstrates that, through the perspective of body-source built-in potential lowering (Delta V-bi), the geometry-dependent floating-body effect in state-of-the-art silicon-on-insulator (SOI) MOS-FETs can be explained and predicted by the geometry dependence of threshold voltage (V-T). The correlation between Delta V-bi and V-T unveiled in this brief is the underlying mechanism responsible for the coexistence of partially depleted and fully depleted devices in a single SOI chip.
URI: http://dx.doi.org/10.1109/TED.2005.850626
http://hdl.handle.net/11536/13552
ISSN: 0018-9383
DOI: 10.1109/TED.2005.850626
期刊: IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume: 52
Issue: 7
起始頁: 1662
結束頁: 1664
顯示於類別:期刊論文


文件中的檔案:

  1. 000230123100053.pdf