標題: Substrate-bias-dependent dielectric breakdown in ultrathin-oxide p-metal-oxide-semiconductor field-effect transistors
作者: Chiang, S
Lu, MF
Huang-Lu, S
Chien, SC
Wang, TH
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
公開日期: 15-七月-2005
摘要: An explanation of the breakdown behavior of ultrathin-gate-oxide (1.6 nm) p-metal-oxide-semiconductor field-effect transistors under a reverse substrate bias is presented. A significant degradation in lifetime induced by a positive substrate bias and a decrease in the power-law exponent (n) were observed. The quantitative hydrogen-based model [J. Sune and E. Wu, Digest of Technical Papers, 2001 Symposium on VLSI Technology, Kyoto, Japan, 12-14 June 2001 (unpublished), p. 97] is used to explain this observation while taking the channel quantization effect into consideration. Using this model, the stress voltage dependence of time-dependent dielectric breakdown in our experiment fits well with simulation results. This indicates that the degradation is due to the channel hole quantization-enhanced dissipation energy of injected electrons at the anode interface. (c) 2005 American Institute of Physics.
URI: http://dx.doi.org/10.1063/1.1980529
http://hdl.handle.net/11536/13488
ISSN: 0021-8979
DOI: 10.1063/1.1980529
期刊: JOURNAL OF APPLIED PHYSICS
Volume: 98
Issue: 2
結束頁: 
顯示於類別:期刊論文


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  1. 000230931500072.pdf