標題: JAIP-MP: A Four-Core Java Application Processor for Embedded Systems
作者: Tsai, Chun-Jen
Wu, Tsung-Han
Su, Hung-Cheng
Chen, Cheng-Yang
資訊工程學系
Department of Computer Science
關鍵字: Java processors;Multi-core processors;Embedded SoC;Hardwired operating system kernel
公開日期: 2016
摘要: In this chapter, we present a four-core Java application processor, JAIP-MP. In addition to supporting multi-core coherent data accesses to shared memory, each processor core in JAIP-MP is a hardwired Java core that is capable of dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method/object caching, Java exception handling, preemptive multi-threading, and memory management. Most of the essential OS kernel functions are implemented in hardware. In particular, the preemptive multi-threading performance is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. Currently, single-cycle context switching with a time quantum as small as 20 mu s can be achieved by each core. More importantly, the Java language model itself makes it possible to maintain binary portability of application software regardless of the hardwired OS kernel component. In summary, JAIP-MP could be used to study the potential benefits of OS kernel implementation in hardware.
URI: http://dx.doi.org/10.1007/978-3-319-46097-0_9
http://hdl.handle.net/11536/134589
ISBN: 978-3-319-46097-0
978-3-319-46096-3
ISSN: 1868-4238
DOI: 10.1007/978-3-319-46097-0_9
期刊: VLSI-SOC: DESIGN FOR RELIABILITY, SECURITY, AND LOW POWER
Volume: 483
起始頁: 170
結束頁: 192
Appears in Collections:Conferences Paper