Title: High-Voltage Amorphous InGaZnO TFT With Al2O3 High-k Dielectric for Low-Temperature Monolithic 3-D Integration
Authors: Yu, Ming-Jiue
Lin, Ruei-Ping
Chang, Yu-Hong
Hou, Tuo-Hung
Department of Electronics Engineering and Institute of Electronics
Keywords: 3-D integration;amorphous-indium-gallium-zinc-oxide (a-IGZO);high-k dielectric;power management IC (PMIC);thin-film transistor (TFT)
Issue Date: Oct-2016
Abstract: On-chip high-voltage (HV) power management integrated circuits would deliver smaller form factor, lower system cost, higher power efficiency, and suppressed noise in system-on-chip designs. A reliable HV amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technology has been presented for potential applications of monolithic 3-D integration on CMOS. By using a process temperature below 200 degrees C, the instability of positive-and negative-bias stresses can be carefully minimized. The HV a-IGZO TFT with an Al2O3 high-k gate dielectric possesses a high breakdown voltage exceeding 45 V, a high saturation mobility of 11.3 cm(2)/Vs, and a large ON-/OFF-current ratio of 10(9). The long-term reliability study projects that the device can be operated at 20 V for ten years without catastrophic dielectric breakdown while maintaining sufficient ON-current.
URI: http://dx.doi.org/10.1109/TED.2016.2598396
ISSN: 0018-9383
DOI: 10.1109/TED.2016.2598396
Volume: 63
Issue: 10
Begin Page: 3944
End Page: 3949
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