標題: New Findings on the Drain-Induced Barrier Lowering Characteristics for Tri-Gate Germanium-on-Insulator p-MOSFETs
作者: Wu, Shu-Hua
Yu, Chang-Hung
Su, Pin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: Tri-gate MOSFET;multi-gate MOSFET;GeOI;SOI;DIBL
公開日期: 十一月-2015
摘要: This paper investigates the intrinsic drain-induced barrier lowering (DIBL) characteristics for tri-gate germanium-on-insulator (GeOI) p-MOSFETs through theoretical calculation by analytical solution of 3-D Poisson\'s equation corroborated with TCAD numerical simulation. It is found that, relative to the silicon-on-insulator counterpart, there exists a build-in negative substrate bias in the GeOI PFET. This built-in substrate bias, stemming mainly from the large discrepancy in bandgap between Ge and Si, pulls the carriers toward the channel/BOX interface and thus degrades the DIBL of the GeOI PFET beyond what permittivity predicts. This new mechanism has to be considered when designing or benchmarking tri-gate GeOI p-MOSFETs.
URI: http://dx.doi.org/10.1109/JEDS.2015.2475262
http://hdl.handle.net/11536/133374
ISSN: 2168-6734
DOI: 10.1109/JEDS.2015.2475262
期刊: IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume: 3
Issue: 6
起始頁: 441
結束頁: 446
顯示於類別:期刊論文