Title: A novel vertical bottom-gate polysilicon thin film transistor with self-aligned offset
Authors: Lai, CS
Lee, CL
Lei, TF
Chern, HN
電子工程學系及電子研究所
電控工程研究所
Department of Electronics Engineering and Institute of Electronics
Institute of Electrical and Control Engineering
Issue Date: 1-May-1996
Abstract: A novel device structure for the vertical bottom polysilicon gate thin film transistor (TFT) with a self-align offset drain is proposed and demonstrated, The new VTFT allows a deep-submicron channel length, which is determined by the thickness of the active polysilicon film, not by the lithographic system resolution, The self-alignment offset drain reduces the leakage current, as a result, it exhibits good device performance.
URI: http://dx.doi.org/10.1109/55.491828
http://hdl.handle.net/11536/1316
ISSN: 0741-3106
DOI: 10.1109/55.491828
Journal: IEEE ELECTRON DEVICE LETTERS
Volume: 17
Issue: 5
Begin Page: 199
End Page: 201
Appears in Collections:Articles


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