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dc.contributor.author陳智zh_TW
dc.contributor.authorChen Chihen_US
dc.date.accessioned2016-03-28T08:17:36Z-
dc.date.available2016-03-28T08:17:36Z-
dc.date.issued2015en_US
dc.identifier.govdocNSC102-2221-E009-040-MY3zh_TW
dc.identifier.urihttp://hdl.handle.net/11536/130219-
dc.identifier.urihttps://www.grb.gov.tw/search/planDetail?id=11273505&docId=455839en_US
dc.description.abstract我們實驗室於去年電鍍出高密度<111>奈米雙晶銅並發表在科學(Science)期刊上,發現加入<111>奈米雙晶銅提升可以減緩Kirkendall voids生成,並能控制生長於其上的介金屬化合物(intermetallic compounds)方向。因此<111>奈米雙晶銅很有潛力應用於封裝產業上。本計畫將對<111>奈米雙晶銅應用於微電子封裝做一系列的研究,針對<111>奈米雙晶銅/銲錫界面的電遷移(electromigration)與奈米雙晶銅墊層對/銲錫冶金反應的議題上有系統性的研究,銲錫接點越做越小,其電遷移與冶金反應可靠度就更重要。 第一年我們將製作具有不同微結構的銅墊層與無鉛銲錫試片,研究<111>奈米雙晶銅墊層與銲錫冶金反應,研究Kirkendall voids生與生長於其上的介金屬化合物方向。使用電子背向散射儀(EBSD)觀測奈米雙晶銅與介金屬化合物的晶格方向。並同時用微影技術製作 <111>奈米雙晶銅/銲錫界面的結構,研究其電遷移。同時開始設計與製造覆晶<111>奈米雙晶銅銲錫接點電遷移試片。第二年將持續研究<111>奈米雙晶銅如何影響Kirkendall voids與生長於其上的介金屬化合物方向。並開始研究覆晶<111>奈米雙晶銅銲錫接點電遷移,找出其破壞時間及機制與無<111>奈米雙晶銅銲錫接點有何不同。第三年我們將持續研究<111>奈米雙晶銅如何影響覆晶奈米雙晶銅銲錫接點電遷移,並將這些覆晶接點加熱成完全介金屬化合物接點,再研究<111>奈米雙晶銅/介金屬化合物接點的電遷移。探討其破壞機制。此計畫將會在科學研究及應用於為電子產業有很多的貢獻。zh_TW
dc.description.abstractOur lab successfully achieved the fabrication of <111> nanotwinned Cu and reported the results in Science. We found that the <111> nanotwinned Cu can retard the formation of Kirkendall voids during Cu-Sn reactions. In addition, it can control the orientation of the Cu-Sn intermetallic compounds grown on it. Thus, the <111> nanotwinned Cu may have potential for the application in packaging industry. This proposal will systematically study the application of <111> nanotwinned Cu to microelectronics devices. We will investigate the electromigration in the interface of <111> nanotwinned Cu/solder and the metallurgical reactions between the <111> nanotwinned Cu and Pb-free solders. In the first year, we will fabricate solder joints with different Cu grain structures and study the metallurgical reactions between the <111> nanotwinned Cu and Pb-free solders. We will focus on the Kirkendall voids in Cu-Sn reaction and the orientation of the intermetallic compounds grown on the Cu metallization. We will use EBSD to observe the orientation of the Cu and the intermetallic compounds. We will also fabricate line samples with nanotwinned Cu/solder/ nanotwinned Cu and study the electromigration in the samples. In the same time, we will design and fabricate flip-chip solder joints with <111> nanotwinned Cu. In the second year, we will continue to study the effect of <111> nanotwinned Cu on the Kirkendall voids in Cu-Sn reaction and the orientation of the intermetallic compounds. Then we will start to study the electromigration in flip-chip solder joints with <111> nanotwinned Cu, finding out the electromigration failure time and mechanism. In the third year, we will continue to investigate the electromigration in flip-chip solder joints with <111> nanotwinned Cu. In addition, we will reflow or aging the flip-chip samples in to full intermetallic joints, then study the electromigration failure time and mechanism in the intermetallic joints with nanotwinned Cu. We believe this project will bring scientific findings and benefit the microelectronics industry.en_US
dc.description.sponsorship科技部zh_TW
dc.language.isozh_TWen_US
dc.title&lt;111&gt;奈米雙晶銅墊層之銲錫接點的電遷移及界面冶金反應研究zh_TW
dc.titleElectromigration and Metallurgical Reactions in Solder Joints with &Lt;;111&Gt;;-Oriented Nanotwinned Cu Metallizationen_US
dc.typePlanen_US
dc.contributor.department國立交通大學材料科學與工程學系(所)zh_TW
Appears in Collections:Research Plans