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dc.contributor.authorHou Tuo-Hungen_US
dc.description.abstract電阻式記憶體因為高密度、高效能與製程整合上的優越性,近來倍受矚目。除取代傳統記憶體外,其新興的應用領域包含了資料儲存記憶體與電子突觸技術。資料儲存記憶體同時具備高效能與高密度的特性,預期將能取代現有低效能的硬碟與低密度的現有記憶體架構,在未來的高速資訊系統扮演關鍵的角色。電阻式記憶體做為高密度資料儲存記憶體的終極解決方案,首要證明極富競爭力的單位位元成本,因此,成功開發一類似BiCS SONOS的低成本三維垂直記憶體架構非常關鍵。此外,目前以矽電子元件與von Neumann計算架構為基礎的資訊系統,面臨元件尺度微縮不易與低能源效率問題,因此有許多人認為實現如人腦般的仿生資訊系統,才是未來高性能與高效能資訊系統開發上正確的方向,其中最關鍵的技術為利用電阻式記憶體(憶阻器)的特性實現一低功率的電子突觸元件。 過去數年間,我們在交通大學的電阻式記憶體研究團隊迅速地建立了在國內相關研究領域的重要地位,在國際間亦是技術領先的傑出團隊。我們在2011年與2012年共有三篇電阻式記憶體的論文入選IEDM,研究成果深獲肯定。因此我們希望在國科會優秀年輕學者研究計畫的支持下,進行新一階段的前瞻電阻式記憶體研究,此三年計畫主要目標在開發超高密度BiCS 三維電阻式記憶體所需之關鍵製程與元件技術,包含三維電阻式記憶體陣列結構,側壁式奈米等級與具自我選擇特性之非線性電阻式記憶體元件,高密度記憶體陣列電路模擬,元件操作變異性之電性評估、量化物理模型、改善方法,最終驗證其在高密度資料儲存記憶體應用上之潛力。另一方面,整合三維陣列架構與超低能耗(~fJ)電阻式記憶體,突破現有電子突觸與仿神經計算應用上低密度與高能耗的限制。此計畫結合本研究團隊過去在電阻式記憶體開發上,包含製程整合、元件開發、電路模擬、量化物理模型、電性量測等各個面向上的豐富經驗與領先技術,深入探討三維電阻式記憶體在高密度資料儲存記憶體與電子突觸等傳統記憶體元件無法實現之新興應用,無論從科學探索或工程研究的角度皆深具意義。zh_TW
dc.description.abstractResistive-switching random access memory (RRAM) has gained significant attention recently because of its high density, superior performance, and ease of process integration. Besides replacing conventional memory devices, the emerging applications of RRAM includes storage-class memory (SCM) and electronic synapse. SCM combining the advantages of high performance and density is expected to replace existing low-efficient hard disks and low-density memories and plays a crucial role in future high-speed IT systems. RRAM as a ultimate high-density SCM solution has to first demonstrate competitive cost per Gb storage. Therefore, the successful development of a low-cost three-dimensional (3D) vertical memory array similar to the bit-cost-scalable (BiCS) SONOS memory is critical. Furthermore, the existing IT systems based on Si devices and the von Neumann architecture suffer from the fundamental problems of device scaling and low energy efficiency. As a result, many believe that neuromorphic computation similar to how our brain operates is a promising direction to pursue for future high-performance and high-efficiency IT systems. Among many challenges, the most critical technology to develop is a low-power electronic synaptic device using the unique characteristics of RRAM (or sometimes called memristor). In the past few years, our NCTU lab has rapidly emerged as a elite RRAM research team worldwide. We have published three IEDM papers in 2011 and 2012 with a global reputation. Therefore, we hope to proceed a new phase of novel RRAM research with a strong support from the NSC Excellent Young Scholar Project. This three-year project emphasizes on the crucial process and device development of a ultrahigh-density BiCS 3D RRAM technology, including process integration of 3D RRAM arrays, nanoscale sidewall and self-selecting nonlinear RRAM devices, circuit analysis of high-density 3D RRAM arrays, assessment of device cycling variations (statistical electrical characterization, numerical modeling, and experimental improvement). Finally the potential of the BiCS 3D RRAM as a promising SCM will be evaluated. Furthermore, to overcome the limitation of low density and high energy consumption in present electronic synapses and neuromorphic computation, this project investigates the integration of 3D RRAM arrays with a novel synaptic RRAM cell that requires ultralow switching energy (~fJ). Leveraging the comprehensive experience and the leading-edge RRAM technology developed in our research team, this project explores emerging applications of 3D RRAM, which cannot be realized using conventional memory technologies, and therefore is extremely important from both scientific and technological perspectives.en_US
dc.subject3D memory arrayen_US
dc.subjectStorage-class memoryen_US
dc.subjectElectronic synapseen_US
dc.subjectBit-cost scalable (BiCS)en_US
dc.title應用於高密度資料儲存記憶體與電子突觸之BiCS 三維電阻式記憶體開發zh_TW
dc.titleBiCS 3D RRAM Technology for High-Density Data-Storage Memory and Electronic Synapses Applicationsen_US
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