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dc.contributor.authorHuang, Ya-Shihen_US
dc.contributor.authorChang, Han-Yuanen_US
dc.contributor.authorHuang, Juinn-Daren_US
dc.date.accessioned2015-12-02T02:59:25Z-
dc.date.available2015-12-02T02:59:25Z-
dc.date.issued2015-08-01en_US
dc.identifier.issn1745-1337en_US
dc.identifier.urihttp://dx.doi.org/10.1587/transfun.E98.A.1796en_US
dc.identifier.urihttp://hdl.handle.net/11536/128175-
dc.description.abstractThe emerging three-dimensional (3D) technology is considered as a promising solution for achieving better performance and easier heterogeneous integration. However, the thermal issue becomes exacerbated primarily due to larger power density and longer heat dissipation paths. The thermal issue would also be critical once FPGAs step into the 3D arena. In this article, we first construct a fine-grained thermal resistive model for 3D FPGAs. We show that merely reducing the total power consumption and/or minimizing the power density in vertical direction is not enough for a thermal-aware 3D FPGA backend (placement and routing) flow. Then, we propose our thermal-aware backend flow named TherWare considering location-based heat balance. In the placement stage, TherWare not only considers power distribution of logic tiles in both lateral and vertical directions but also minimizes the interconnect power. In the routing stage, TherWare concentrates on overall power minimization and evenness of power distribution at the same time. Experimental results show that TherWare can significantly reduce the maximum temperature, the maximum temperature gradient, and the temperature deviation only at the cost of a minor increase in delay and runtime as compared with present arts.en_US
dc.language.isoen_USen_US
dc.subjectthermal-aware placement and routingen_US
dc.subjectdesign for qualityen_US
dc.subjectfield programmable gate arrays (FPGAs)en_US
dc.subject3D ICsen_US
dc.subject3D FPGAsen_US
dc.titleTherWare: Thermal-Aware Placement and Routing Framework for 3D FPGAs with Location-Based Heat Balanceen_US
dc.typeArticleen_US
dc.identifier.doi10.1587/transfun.E98.A.1796en_US
dc.identifier.journalIEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCESen_US
dc.citation.volumeE98Aen_US
dc.citation.spage1796en_US
dc.citation.epage1805en_US
dc.contributor.department電子工程學系及電子研究所zh_TW
dc.contributor.departmentDepartment of Electronics Engineering and Institute of Electronicsen_US
dc.identifier.wosnumberWOS:000359467200029en_US
dc.citation.woscount0en_US
Appears in Collections:Articles