標題: An assessment of single-electron effects in multiple-gate SOI MOSFETs with 1.6-nm gate oxide near room temperature
作者: Lee, W
Su, P
Chen, HY
Chang, CY
Su, KW
Liu, S
Yang, FL
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOS;coulomb blockade oscillation;multiple gate;silicon-on-insulator (SOI);single-electron effect;single-electron transistor
公開日期: 1-Mar-2006
摘要: This letter provides an assessment of single-electron effects in ultrashort multiple-gate silicon-on-insulator (SOI) MOSFETs with 1.6-nm gate oxide. Coulomb blockade oscillations have been observed at room temperature for gate bias as low as 0.2 V. The charging energy, which is about 17 meV for devices with 30-nm gate length, may be modulated by the gate geometry. The multiple-gate SOI MOSFET, with its main advantage in the suppression of short-channel effects for CMOS scaling, presents a very promising scheme to build room-temperature single-electron transistors with standard silicon nanoelectronics process.
URI: http://dx.doi.org/10.1109/LED.2006.870240
http://hdl.handle.net/11536/12561
ISSN: 0741-3106
DOI: 10.1109/LED.2006.870240
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 27
Issue: 3
起始頁: 182
結束頁: 184
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