Title: ESD Protection Design for Radio-Frequency Integrated Circuits in Nanoscale CMOS Technology
Authors: Lin, Chun-Yu
Chu, Li-Wei
Tsai, Shiang-Yu
Ker, Ming-Dou
Song, Ming-Hsiang
Jou, Chewn-Pu
Lu, Tse-Hua
Tseng, Jen-Chou
Tsai, Ming-Hsien
Hsu, Tsun-Lai
Hung, Ping-Fang
Wei, Yu-Lin
Chang, Tzu-Heng
Department of Electronics Engineering and Institute of Electronics
Issue Date: 1-Jan-2013
Abstract: Nanoscale CMOS technologies have been used to implement the radio-frequency integrated circuits. However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness of IC products. Therefore, on-chip ESD protection designs must be added at all input/output pads in CMOS chip. To minimize the impacts from ESD protection on circuit performances, ESD protection at input/output pads must be carefully designed. In this work, a new proposed ESD protection design has been realized in a nanoscale CMOS process. Experimental results of the test circuits have been successfully verified, including RF performances, I-V characteristics, and ESD robustness.
URI: http://hdl.handle.net/11536/124971
ISBN: 978-1-4799-0675-8; 978-1-4799-0676-5
Begin Page: 241
End Page: 244
Appears in Collections:Conferences Paper