標題: Advanced Cu chemical displacement technique for SiO2-based electrochemical metallization ReRAM application
作者: Chin, Fun-Tat
Lin, Yu-Hsien
You, Hsin-Chiang
Yang, Wen-Luh
Lin, Li-Min
Hsiao, Yu-Ping
Ko, Chum-Min
Chao, Tien-Sheng
電子物理學系
Department of Electrophysics
關鍵字: Cu CDT;SiO2;ECM;ReRAM
公開日期: 28-十月-2014
摘要: This study investigates an advanced copper (Cu) chemical displacement technique (CDT) with varying the chemical displacement time for fabricating Cu/SiO2-stacked resistive random-access memory (ReRAM). Compared with other Cu deposition methods, this CDT easily controls the interface of the Cu-insulator, the switching layer thickness, and the immunity of the Cu etching process, assisting the 1-transistor-1-ReRAM (1T-1R) structure and system-on-chip integration. The modulated shape of the Cu-SiO2 interface and the thickness of the SiO2 layer obtained by CDT-based Cu deposition on SiO2 were confirmed by scanning electron microscopy and atomic force microscopy. The CDT-fabricated Cu/SiO2-stacked ReRAM exhibited lower operation voltages and more stable data retention characteristics than the control Cu/SiO2-stacked sample. As the Cu CDT processing time increased, the forming and set voltages of the CDT-fabricated Cu/SiO2-stacked ReRAM decreased. Conversely, decreasing the processing time reduced the on-state current and reset voltage while increasing the endurance switching cycle time. Therefore, the switching characteristics were easily modulated by Cu CDT, yielding a high performance electrochemical metallization (ECM)-type ReRAM.
URI: http://dx.doi.org/10.1186/1556-276X-9-592
http://hdl.handle.net/11536/124284
ISSN: 1556-276X
DOI: 10.1186/1556-276X-9-592
期刊: NANOSCALE RESEARCH LETTERS
顯示於類別:期刊論文


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