標題: A compact 12-bit DAC with novel bias scheme
作者: Chou, Fang-Ting
Hung, Chung-Chih
電機資訊學士班
Undergraduate Honors Program of Electrical Engineering and Computer Science
關鍵字: digital-to-analog converter;DAC;compact area
公開日期: 1-一月-2014
摘要: A compact and low-power design of a 12-bit binary-weighted current-steering DAC is presented. Instead of 4096 unit current cells, the proposed design uses 192 unit current sources with two reference currents. The silicon area of the generation circuit of two reference currents is very compact as well. The area of the total current source arrays is smaller than four times the area of 6-bit current source arrays, which has significantly reduced the dimension of the analog part of a conventional 12-bit DAC. The proposed DAC achieves 400 MS/s update rate and consumes 38.7 mW from single 1.8 V supply.
URI: http://dx.doi.org/10.1587/elex.11.20140572
http://hdl.handle.net/11536/124164
ISSN: 1349-2543
DOI: 10.1587/elex.11.20140572
期刊: IEICE ELECTRONICS EXPRESS
Volume: 11
Issue: 17
顯示於類別:期刊論文


文件中的檔案:

  1. 000344925800011.pdf