|標題:||Active Guard Ring to Improve Latch-Up Immunity|
Department of Electronics Engineering and Institute of Electronics
|關鍵字:||Electrostatic discharge (ESD) protection;guard ring;latchup|
|摘要:||A new design concept named as active guard ring and related circuit implementation to improve the latch-up immunity of ICs are proposed. Using additional sensing circuit and active buffer to turn ON the electrostatic discharge (ESD) protection transistors, the large-dimensional ESD (or I/O) devices can provide or receive extra compensation current to the negative or positive current perturbation during the latch-up current test. The new proposed solution has been verified in 0.6-mu m 5 V process to have much higher latch-up resistance compared with the conventional prevention method of guard ring in CMOS technology.|
|期刊:||IEEE TRANSACTIONS ON ELECTRON DEVICES|
|Appears in Collections:||Articles|
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