標題: Correlating drain-current with strain-induced mobility in nanoscale strained CMOSFETs
作者: Lin, Hong-Nien
Chen, Hung-Wei
Ko, Chih-Hsin
Ge, Chung-Hu
Lin, Horng-Chih
Huang, Tiao-Yuan
Lee, Wen-Chin
電子工程學系及電子研究所
Department of Electronics Engineering and Institute of Electronics
關鍵字: CMOSFETs;current;mobility;strain
公開日期: 1-八月-2006
摘要: The correlation between channel mobility gain (Delta mu), linear drain-current gain (AIdlin), and saturation draincurrent gain (Delta I-dsat) of nanoscale strained CMOSFETs are reported. From the plots of Delta I-dlin versus Delta I-dsat and ballistic efficiency (B-sat,B-PSS), the ratio of source/drain parasitic resistance (R-sat,R-PSS) to channel resistance (R-CH,R-PSS) of strained CMOSFETs can be extracted. By plotting Delta mu versus Delta I-dlin, the efficiency of Delta mu translated to Delta I-dlin is higher for strained pMOSFETs than strained nMOSFETs due to smaller R-SD,R-PSS-to-R-CH,R-PSS ratio of strained pMOSFETs. It suggests that to exploit strain benefits fully, the R-SD,R-PSS reduction for strained nMOSFETs is vital, while for strained pMOSFETs the Delta I-dli -to-Delta mu sensitivity is maintained until R-SD,R-PSS becomes comparable to/or higher than R-CH,R-PSS.
URI: http://dx.doi.org/10.1109/LED.2006.878035
http://hdl.handle.net/11536/11969
ISSN: 0741-3106
DOI: 10.1109/LED.2006.878035
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 27
Issue: 8
起始頁: 659
結束頁: 661
顯示於類別:期刊論文


文件中的檔案:

  1. 000239440700009.pdf