標題: Analysis of poly-Si TFT degradation under gate pulse stress using the slicing model
作者: Tai, Ya-Hsiang
Huang, Shih-Che
Chen, Chien-Kwen
光電工程學系
顯示科技研究所
Department of Photonics
Institute of Display
關鍵字: AC stress;dynamic stress;poly-Si thin-film transistors (TFTs);reliability
公開日期: 1-Dec-2006
摘要: The device degradation of polycrystalline-silicon thin-film transistors stressed with different gate pulse waveforms is investigated. It is first observed that the degradation is dependent on the rising time of the gate pulses for the gate voltage swing below the threshold voltage. The degradation ratio of the mobility is analyzed with respect to two factors, namely, the magnitude of the lateral transient electric field and the change in the numbers of the carrier near the edges of the channel. A new index considering these two factors is proposed to depict the device degradation. It shows good linearity between the degradation in mobility and the proposed index.
URI: http://dx.doi.org/10.1109/LED.2006.886416
http://hdl.handle.net/11536/11509
ISSN: 0741-3106
DOI: 10.1109/LED.2006.886416
期刊: IEEE ELECTRON DEVICE LETTERS
Volume: 27
Issue: 12
起始頁: 981
結束頁: 983
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