標題: A CMOS ratio-independent and gain-insensitive algorithmic analog-to-digital converter
作者: Chin, SY
Wu, CY
電子工程學系及電子研究所
電控工程研究所
Department of Electronics Engineering and Institute of Electronics
Institute of Electrical and Control Engineering
公開日期: 1-八月-1996
摘要: This paper describes the design of a CMOS capacitor-ratio-independent and gain-insensitive algorithmic analog-to-digital (A/D) converter. Using the fully differential switched-capacitor technique, the A/D converter is insensitive to capacitor-ratio accuracy as well as finite gain and offset voltage of operational amplifiers. The switch-induced error voltage becomes the only major error source, which is further suppressed by the fully differential structure. The proposed A/D converter is designed and fabricated by 0.8 mu m double-poly double-metal CMOS technology. The op-amp gain is only 60 dB and no special layout care is done for capacitor matching. Experimental results have shown that 14-b resolution at the sampling frequency of 10 kHz can be achieved in the fabricated A/D converter. Thus it can be used in the applications which require low-cost high-resolution A/D conversion.
URI: http://dx.doi.org/10.1109/4.508271
http://hdl.handle.net/11536/1134
ISSN: 0018-9200
DOI: 10.1109/4.508271
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 31
Issue: 8
起始頁: 1201
結束頁: 1207
顯示於類別:期刊論文


文件中的檔案:

  1. A1996VA81000018.pdf