標題: Function-in-layout: A demonstration with bio-inspired hyperacuity chip
作者: Mozsary, Andras
Chung, Jen-Feng
Roska, Tamas
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: function-in-layout;delay-domain computing;non-Boolean logic;hyperacuity;cellular neural network;cellular nonlinear network;cellular wave computer;time-to-digital converter
公開日期: 1-Mar-2007
摘要: Below 100nm a new scenario is emerging in VLSI design: floorplanning and function are inherently interrelated. Using mainly local connectivity, wire delay and crosstalk problems are eliminated. A new design methodology is proposed, called function-in-layout, that possesses: regular layout, mainly local connectivity, functional 'parasitics'. A bio-inspired demonstration is presented, a hyperacuity chip, with 30 ps time difference detection using 0.35 mm complementary metal-oxide semiconductor (CMOS) technology. Copyright (C) 2006 John Wiley & Sons, Ltd.
URI: http://dx.doi.org/10.1002/cta.385
http://hdl.handle.net/11536/11061
ISSN: 0098-9886
DOI: 10.1002/cta.385
期刊: INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS
Volume: 35
Issue: 2
起始頁: 149
結束頁: 164
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