標題: Method of fabricating copper metallization on backside of gallium arsenide devices
作者: Chang, Edward Yi
Lee, Cheng-Shih
公開日期: 21-Apr-2005
摘要: A bi-level structure based on copper metallization technique has been applied to backside of gallium arsenide (GaAs) devices. The foundation where the structure stands on is device substrate backside, on which a layer of diffusion barrier is deposited first, and to the top of it, a layer of copper metallization is plated to enhance device performance. The barrier layer can be selected from tungsten (W), tungsten nitride (WN), or titanium tungsten nitride (TiWN) by sputtering or evaporating, which effectively prevents copper from diffusing into GaAs substrate. The layer of copper metallization, formed by employing anyone of sputtering, evaporating, or electroplating, proves to offer attractive thermal and electrical conductivity and mechanical strength and the like. Moreover, these characteristic improvements coupled with a fascinating part, low cost, would benefit and motivate global GaAs fabs.
官方說明文件#: H01L021/302
H01L021/461
URI: http://hdl.handle.net/11536/105748
專利國: USA
專利號碼: 20050085084
Appears in Collections:Patents


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