標題: Dithering skip modulation, width and dead time controllers in highly efficient DC-DC converters for system-on-chip applications
作者: Huang, Hong-Wei
Chen, Ke-Horng
Kuo, Sy-Yen
電控工程研究所
Institute of Electrical and Control Engineering
關鍵字: DC-DC converter;delay-line chain;dithering skip modulation;ground bounce;load sensing circuit;optimum dead-time;width controller
公開日期: 1-十一月-2007
摘要: This paper proposes temperature-independent load sensor (LS), optimum width controller (OWC), optimum dead-time controller (ODC), and tri-mode operation to achieve high efficiency over an ultra-wide-load range. Higher power efficiency and wider loading current range require rethinking the control method for DC-DC converters.. Therefore, a highly efficient tri-mode DC-DC converter is invented in this paper for system-on-chip (SoC) applications, which is switched to sleeping mode at very light load condition or to high-speed mode at heavy load condition. The efficiency improvement is upgraded by inserting new proposed dithering skip modulation (DSM) between conventional pulse-width modulation (PWM) and pulse-frequency modulation (PFM). In other words, an efficiency-improving DSM operation raises the efficiency drop because of transition from PWM to PFM. Importantly, DSM mode can dynamically skip the number of gate driving pulses, which is inverse proportional to load current. Simplistically and qualitatively stated, the novel load sensor automatically selects optimum modulation method and power MOSFET width to achieve high efficiency over a wide load range. Moreover, optimum power MOSFET turn-on and turn-off delays in synchronous rectifiers and reduced ground bounce can save much switching loss by current-mode dead-time controller. Experimental results show the tri-mode operation can have high efficiency about 90% over a wide load current range from 3 to 500 mA. Owing to the effective mitigation of the switching loss contributed by optimum power MOSFET width and reduction of conduction loss contributed by optimum dead-times, the novel width and dead-time controllers achieve high efficiency about 95% at heavy load condition and maintain the highly efficient performance to very light load current about 0.1 mA.
URI: http://dx.doi.org/10.1109/JSSC.2007.907175
http://hdl.handle.net/11536/10158
ISSN: 0018-9200
DOI: 10.1109/JSSC.2007.907175
期刊: IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume: 42
Issue: 11
起始頁: 2451
結束頁: 2465
顯示於類別:期刊論文


文件中的檔案:

  1. 000250524500015.pdf