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Issue DateTitleAuthor(s)
2009Critical-Trunk Based Obstacle-Avoiding Rectilinear Steiner Tree Routings for Delay and Slack OptimizationLin, Yen-Hung; Chang, Shu-Hsin; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
1-May-2007Model checking safety-critical systems using safechartsHsiung, Pao-Ann; Chen, Yean-Ru; Lin, Yen-Hung; 交大名義發表; National Chiao Tung University
1-Sep-2011Critical-Trunk-Based Obstacle-Avoiding Rectilinear Steiner Tree Routings and Buffer Insertion for Delay and Slack OptimizationLin, Yen-Hung; Chang, Shu-Hsin; Li, Yih-Lang; 交大名義發表; National Chiao Tung University
2012Topology-Aware Buffer Insertion and GPU-Based Massively Parallel Rerouting for ECO Timing OptimizationLin, Yen-Hung; Lo, Yun-Jian; Tong, Hian-Syun; Liu, Wen-Hao; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
2012在奈米設計繞線中針對效率,可製造性與良率的最佳化林彥宏; Lin, Yen-Hung; 李毅郎; Li, Yih-Lang; 資訊科學與工程研究所
2010Dead Via Minimization by Simultaneous Routing and Redundant Via InsertionLin, Chih-Ta; Lin, Yen-Hung; Su, Guan-Chan; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
1-Jan-2014Minimizing Critical Area on Grid less Wire Ordering, Sizing and SpacingLee, Yu-Wei; Lin, Yen-Hung; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
2012TRIAD: A Triple Patterning Lithography Aware Detailed RouterLin, Yen-Hung; Yu, Bei; Pan, David Z.; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
2009Topology-Driven Cell Layout Migration with Collinear ConstraintsFu, De-Shiun; Chaung, Ying-Zhih; Lin, Yen-Hung; Li, Yih-Lang; 資訊工程學系; Department of Computer Science
2011Gridless Wire Ordering, Sizing and Spacing with Critical Area MinimizationLee, Yu-Wei; Lin, Yen-Hung; Li, Yih-Lang; 資訊工程學系; Department of Computer Science