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公開日期標題作者
2009A 0.92mm(2) 23.4mW Fully-Compliant CTC Decoder for WiMAX 802.16e ApplicationYen, Shao-Wei; Hu, Ming-Chih; Chen, Chih-Lung; Chang, Hsie-Chia; Jou, Shyh-Jye; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2014A 1-100Mb/s 0.5-9.9mW LDPC Convolutional Code Decoder for Body Area NetworkChen, Chih-Lung; Wu, Sheng-Jhan; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015A 1.31Gb/s, 96.6% Utilization Stochastic Nonbinary LDPC Decoder for Small Cell ApplicationsLee, Xin-Ru; Yang, Chih-Wen; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 11.5-Gbps LDPC Decoder Based on CP-PEG Code ConstructionChen, Chih-Lung; Lin, Kao-Shou; Chang, Hsie-Chia; Fang, Wai-Chi; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-四月-2012A 2.37-Gb/s 284.8 mW Rate-Compatible (491,3,6) LDPC-CC DecoderChen, Chih-Lung; Lin, Yu-Hsiang; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-十一月-2010A 26.9 K 314.5 Mb/s Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2009A 26.9K 314.5Mbps Soft (32400,32208) BCH Decoder Chip for DVB-S2 SystemLin, Yi-Min; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2015A 3.46 Gb/s (9141,8224) LDPC-based ECC scheme and on-line channel estimation for Solid-State Drive ApplicationsHo, Kin-Chu; Chen, Chih-Lung; Liao, Yen-Chin; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013A 3.66Gb/s 275mW TB-LDPC-CC Decoder Chip for MIMO Broadcasting CommunicationsChen, Chih-Lung; Lan, Yu-Cheng; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-九月-2012A 5.79-Gb/s Energy-Efficient Multirate LDPC Codec Chip for IEEE 802.15.3c ApplicationsYen, Shao-Wei; Hung, Shiang-Yu; Chen, Chih-Lung; Chang, Hsie-Chia; Jou, Shyh-Jye; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2012A (50,2,4) Nonbinary LDPC Convolutional Code Decoder Chip over GF(256) in 90nm CMOSLin, Chia-Lung; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
四月-2016A 520k (18900,17010) Array Dispersion LDPC Decoder Architectures for NAND Flash MemoryHo, Kin-Chu; Chen, Chih-Lung; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2016A 7.72 Gb/s LDPC-CC Decoder with Overlapped Architecture for Pre-5G Wireless CommunicationsLin, Chia-Lung; Liu, Rong-Jie; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電機學院; 電子工程學系及電子研究所; College of Electrical and Computer Engineering; Department of Electronics Engineering and Institute of Electronics
1-二月-2015A 7.92 Gb/s 437.2 mW Stochastic LDPC Decoder Chip for IEEE 802.15.3c ApplicationsLee, Xin-Ru; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
2013Adjusted Robust Soliton Distribution (ARSD) with Reshaped Ripple Size for LT CodesYen, Kuo-Kuang; Liao, Yen-Chin; Chen, Chih-Lung; Chang, Hsie-Chia; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-三月-2015An Area-Efficient Relaxed Half-Stochastic Decoding Architecture for Nonbinary LDPC CodesLee, Xin-Ru; Yang, Chih-Wen; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2014Area-efficient TFM-based Stochastic Decoder Design for Non-binary LDPC CodesYang, Chih-Wen; Lee, Xin-Ru; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電機工程學系; Department of Electrical and Computer Engineering
1-九月-2009Design of a Multimode QC-LDPC Decoder Based on Shift-Routing NetworkLiu, Chih-Hao; Lin, Chien-Ching; Yen, Shau-Wei; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; Hsu, Yar-Sun; Jou, Shyh-Jye; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
九月-2016An Efficient Decoder Architecture for Nonbinary LDPC Codes With Extended Min-Sum AlgorithmLin, Chia-Lung; Tu, Shu-Wen; Chen, Chih-Lung; Chang, Hsie-Chia; Lee, Chen-Yi; 電子工程學系及電子研究所; Department of Electronics Engineering and Institute of Electronics
1-一月-2012An Improved LT Encoding Scheme with Extended Chain LengthsYen, Kuo-Kuang; Chen, Chih-Lung; Chang, Hsie-Chia; 交大名義發表; National Chiao Tung University